Computer Aided Verification: 3rd International Workshop, CAV '91, Aalborg, Denmark, July 1-4, 1991. Proceedings
Springer Science & Business Media, 22 באפר׳ 1992 - 487 עמודים
This volume contains the proceedings of the third International Workshop on Computer Aided Verification, CAV '91, held in Aalborg, Denmark, July 1-4, 1991. The objective of this series of workshops is to bring together researchers and practitioners interested in the development and use of methods, tools and theories for automatic verification of (finite) state systems. The workshop provides a unique opportunity for comparing the numerous verification methods and associated verification tools, and the extent to which they may be utilized in application design. The emphasis is not only on new research results but also on the application of existing results to real verification problems. The papers in the volume areorganized into sections on equivalence checking, model checking, applications, tools for process algebras, the state explosion problem, symbolic model checking, verification and transformation techniques, higher order logic, partial order approaches, hardware verification, timed specification and verification, and automata.
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abstract accepting actions algorithm allows applied approach assertion assignment automata automaton axioms behavior bisimulation block boolean branching buffers called circuit communication complexity components composition Computer Science concurrent condition consider consists construction contains correctness corresponding defined definition delay denote derived described efficient element environment equations equivalence example execution exists expression Figure finite Formal formula function give given graph implementation infinite initial input interpretation introduce labeled language logic machine means memory method model checking node Note obtained operators output parallel perform possible present problem Proceedings process algebra proof properties Proposition prove recursive reduction relation represent requirement respect restriction result rules safety satisfies semantics sequence simulation specification step string structure symbolic techniques temporal term theorem trace transformation transition system true variables vector verification