Self-Timed Control of Concurrent Processes: Models and Principles for Designing Aperiodic Logical Circuits in Computers and Discrete Systems

כריכה קדמית
Victor I. Varshavsky
Springer Science & Business Media, 1990 - 408 עמודים
0 ביקורות
 

מה אומרים אנשים - כתיבת ביקורת

לא מצאנו ביקורות במקומות הרגילים

תוכן

INTRODUCTION
1
ASYNCHRONOUS PROCESSES AND THEIR INTERPRETATION
12
212 SOME SUBCLASSES
17
213 REPOSITION
20
214 STRUCTURED SITUATIONS
22
215 AN ASYNCHRONOUS PROCESS AS A METAMODEL
24
22 Petri nets
25
222 SOME CLASSES
27
56 Reference notations
187
COMPOSITION OF ASYNCHRONOUS PROCESSES AND CIRCUITS
189
612 PROCESS REDUCTION
190
613 PROCESS COMPOSITION
193
62 Composition of aperiodic circuits
196
621 THE MULLER THEOREM
197
622 GENERALIZATION OF THE MULLER THEOREM
198
63 Algebra of asynchronous circuits
203

223 INTERPRETATION
28
23 Signal graphs
30
24 The Muller model
33
25 Parallel asynchronous flow charts
36
26 Asynchronous state machines
39
27 Reference notations
41
SELFSYNCHRONIZING CODES
43
32 Directtransition codes
48
33 Twophase codes
51
34 Doublerail code
52
35 Code with identifier
53
36 Optimally balanced code
57
37 On the code redundancy
59
38 Differential encoding
61
39 Reference notations
63
APERIODIC CIRCUITS
64
41 Twophase implementation of finite state machine
65
411 MATCHED IMPLEMENTATION
68
42 Completion indicators and checkers
69
43 Synthesis of combinational circuits
74
431 INDICATABILITY
77
432 STANDARD IMPLEMENTATIONS
85
4322 Orthogonal Form Implementation
86
4323 HysteresisFlipFlopBased Implementation
87
44 Aperiodic flipflops
89
441 FURTHER DISCUSSION OF FLIPFLOP DESIGNS
91
4412 DFlipFlops
94
4413 TFlipFlops
96
45 Canonical aperiodic implementations of finite state machines
98
452 IMPLEMENTATION USING FLIPFLOPS WITH SEPARATED INPUTS
100
46 Implementation with multiple phase signals
106
47 Implementation with direct transitions
109
48 On the definition of an aperiodic state machine
111
49 Reference notations
112
CIRCUIT MODELLING OF CONTROL FLOW
114
51 The modelling of Petri nets
115
512 CONDITIONBASED MODELLING
119
52 The modelling of parallel asynchronous flow charts
124
522 A MULTIPLE USE CIRCUIT
128
523 A LOOP CONTROL CIRCUIT
130
524 USING AN ARBITER
132
525 GUARDBASED IMPLEMENTATION
137
53 Functional completeness and synthesis of semimodular circuits
140
531 FORMULATION OF THE PROBLEM
141
532 SOME PROPERTIES OF SEMIMODULAR CIRCUITS
142
533 PERFECT IMPLEMENTATION
144
534 SIMPLE CIRCUITS
149
535 THE IMPLEMENTATION OF DISTRIBUTIVE AND TOTALLY SEQUENTIAL CIRCUITS
159
54 Synthesis of semimodular circuits in limited bases
165
55 Modelling pipeline processes
175
5512 Pipelinization of a Conditional Branch
183
5513 Transformation of a Loop
184
5514 Pipelinizationfor Multiply Used Sections
185
631 OPERATIONS ON CIRCUITS
204
633 CIRCUIT TRANSFORMATIONS
209
634 HOMOLOGICAL ALGEBRAS OF CIRCUITS
211
64 Reference notations
214
THE MATCHING OF ASYNCHRONOUS PROCESSES AND INTERFACE ORGANIZATION
215
71 Matched asynchronous processes
216
72 Protocol
217
73 The matching asynchronous process
219
74 The T2 interface
222
742 COMMUNICATION PROTOCOL
225
743 IMPLEMENTATION
228
75 Asynchronous interface organization
231
751 USING THE CODE WITH IDENTIFIER
233
752 USING THE OPTIMALLY BALANCED CODE
237
7522 Byte Data Transfer
238
7523 Using NonBalanced Representation
239
76 Reference notations
242
ANALYSIS OF ASYNCHRONOUS CIRCUITS AND PROCESSES
243
81 The reachability analysis
244
82 The classification analysis
252
83 The set of operational states
258
84 The effect of nonzero wire delays
264
85 Circuit Petri nets
273
86 On the complexity of analysis algorithms
278
87 Reference notations
279
ANOMALOUS BEHAVIOUR OF LOGICAL CIRCUITS AND THE ARBITRATION PROBLEM
281
91 Arbiters
284
92 Oscillatory anomaly
286
93 Metastability anomaly
288
94 Designing correctlyoperating arbiters
292
95 Bounded arbiters and safe inertial delays
300
96 Reference notations
307
FAULT DIAGNOSIS AND SELFREPAIR IN APERIODIC CIRCUITS
309
101 Totally selfchecking combinational circuits
311
102 Totally selfchecking sequential machines
313
103 Fault detection in autonomous circuits
314
104 Selfrepair organization for aperiodic circuits
321
105 Reference notations
328
TYPICAL EXAMPLES OF APERIODIC DESIGN MODULES
329
112 Registers
331
113 Pipeline registers
336
1132 SEMIDENSE PIPELINE REGISTER
339
1133 DENSE PIPELINE REGISTERS
340
1134 ONEBYTE DENSE PIPELINE REGISTER
344
1135 PIPELINE REGISTER WITH PARALLEL READWRITE AND THE STACK
345
1136 REVERSIVE PIPELINE REGISTERS
349
114 Converting singlerail signals into doublerail signals
352
1142 INPUT AND OUTPUT HEADS OF PIPELINE REGISTERS
353
115 Counters
355
116 Reference notations
363
REFERENCES
370
SUBJECT INDEX
393
זכויות יוצרים

מהדורות אחרות - הצג הכל

מונחים וביטויים נפוצים

קטעים בולטים

עמוד 376 - Parallel program schemata" Journal of Computer and System Science, pp 147-195, Vol.3, May 1969 [14] Slutz DR "Flowgraph schemata
עמוד 387 - On a Universal Design Procedure to Realize the Semimodular State Transition Graph T.
עמוד 387 - The Annals of the Computation Laboratory of Harvard University (Harvard University Press, Cambridge, Mass., 1947-48).
עמוד 379 - An Introduction to Combinatorial Analysis," John Wiley and Sons, New York, NY; 1958. Review [666]. [704] . "The numbers of labeled colored and chromatic trees,

הפניות לספר זה

כל תוצאות חיפוש הספרים »

מידע ביבליוגרפי